Ttraffic-light-controller-using-FSM

This project designs and simulates a Traffic Light Controller using VHDL and FSM architecture. The system controls traffic flow between two roads through sequential state transitions driven by a clock signal. Vivado simulation verifies correct operation, demonstrating digital logic, FSM design, and VHDL coding.

• Active · last change 5-23-2026
• ★ 1 on GitHub

The files in this directory structure are automatically generated and managed by Vivado. Editing these files is not recommended.