README

Instrumentation Amplifier Test Bench with Microcontroller-Based Differential Signal Generator

PCB implementation and experimental validation of a 3-op-amp instrumentation amplifier using a PWM-based differential and common-mode signal generator.

Instrumentation amplifier test bench during experimental validation.

Introduction

The aim of this repository is to help students, hobbyists and engineers build a practical understanding of instrumentation amplifiers (INAs). By exploring their ability to reject common-mode interference while preserving differential signal integrity, the reader will develop an understanding of their key role in signal acquisition and conditioning. The repository also includes a diferrential signal generator designed as a test bench for the instrumentation amplifier. Its design process is well documented for any reader interested in PWM-based signal synthesis, active analog filtering and frequency-domain analysis using oscilloscope measurements and MATLAB.

This project is built around the idea that a design is only as valuable as the engineer's ability to validate it experimentally.

Inspired by a discussion with Petr Dvořák on The Amp Hour #669.

Throughout this project, the reader will explore:

• Microcontroller-based PWM signal synthesis (Arduino Uno),
• First and second order active filters design for PWM-based sinusoidal signal synthesis,
• Theoretical Frequency domain analysis with Matlab simulations,
• Experimental Frequency domain analysis of the synthesised signals and hardware (oscilloscope),
• Experimental instrumentation amplifier performance validation.

Project workflow:

1. Generate two PWM-modulated sinusoidal signals using an Arduino.
2. Reconstruct the sinusoidal envelopes through active analog filters.
3. Combine both signals into differential and common-mode components.
4. Characterize the generated signals using oscilloscope measurements and MATLAB.
5. Evaluate the instrumentation amplifier's ability to reject common-mode interference while preserving the differential signal.

[!IMPORTANT] Why generate sinusoidal test signals? The instrumentation amplifier can be though of as a building block of a signal acquisition circuit. Wires and PCB tracks are susceptible to ambient electromagnetic noise wich deteriorates the useful signal's integrity. The 60 Hz common mode signal used in the test bench is meant to represent the noise induced by the ambient power grid which has a sinusoidal shape. As for the usefull signal, its sinusoidal shape is chosen for simplicity, but also because the signal's quality is easy to asses visualy.

[!Note] While the complete PCB files are provided to allow readers to reproduce the project, the primary objective of this repository is educational. Readers are encouraged to adapt, improve, and experiment with the design rather than simply replicate it.

Table of Contents

• Introduction
• System Overview
  • Generating Sinusoidal Signals from Filtered PWM Carriers
  • Analog Filter Stages
    • First-Order Active High-Pass Filter
    • First-Order Active Low-Pass Filter
    • Second-Order Sallen-Key Low-Pass Filter
  • Differential Signal Generator
  • Instrumentation Amplifier
• CMRR and Measured Performance
• Testing the Signal
  • Experimental PWM Signal Validation
  • Viewing Filtered Sinusoidal Signals
  • Viewing Differential Signals with Common Mode
  • Viewing Common-Mode Attenuation
• Hardware Implementation
  • Breadboard Prototype
  • PCB Design
    • Signal Generator PCB
    • Instrumentation Amplifier PCB
    • Performance
• Compatibility
• Safety
• Resources
• Acknowledgements

System overview

Generating sinusoidal signals from filtered PWM carriers

The Arduino could generate a staircase approximation of a sinusoidal waveform directly from the lookup-table (LUT) values. However, the quantization and discrete-time updates inherent to a staircase waveform introduce additional spectral components. Since the objective is to characterize the INA, these imperfections would make it more difficult to distinguish distortion originating from the signal generator from distortion introduced by the instrumentation amplifier under test (See Figure 1).

Figure 1. Staircase approximation of the 60 Hz sinusoidal signal
generated from the lookup-table values and its normalized frequency
spectrum (right). In addition to the desired fundamental component, the
discrete update process produces high-frequency spectral images around
the LUT update frequency.

Instead, the sinusoidal lookup table is used to continuously adjust the duty cycle of a high-frequency PWM carrier. By shifting most of the unwanted spectral content around the PWM carrier frequency, analog reconstruction filters can effectively recover the low-frequency sinusoidal envelope.

The analog reconstruction filters are designed to:

• remove the DC component introduced by the PWM duty-cycle offset,
• preserve the desired sinusoidal envelope,
• attenuate the PWM carrier and its associated sidebands.

The figures below illustrate the signal generation process for the 60 Hz path.

Sinusoidal lookup table

The sinusoidal lookup table (LUT) defines the duty-cycle trajectory used to modulate the PWM carrier.

The LUT values are generated offline and embedded in the Arduino firmware through dedicated header files located in the firmware section of this repository. During operation, the microcontroller continuously updates the PWM duty cycle by stepping through the LUT entries.

Although Figure 2 displays a sinusoidal waveform for visualization purposes, no analog sinusoidal voltage is directly generated by the microcontroller. The only signal produced by the Arduino is a variable-duty-cycle PWM waveform whose average value follows the sinusoidal trajectory defined by the LUT.

After analog filtering, the low-frequency sinusoidal envelope is reconstructed while the high-frequency PWM carrier and its associated harmonics are attenuated.

Figure 2. Time-domain representation of the 60 Hz lookup table and the corresponding PWM waveform.

Frequency-domain analysis

Figure 3 shows the spectrum of the sinusoidal lookup table (LUT), revealing the desired 60 Hz component together with a large DC component resulting from the positive-only PWM duty-cycle range.

Figure 4 shows the spectrum of the corresponding PWM signal. After modulation, the desired 60 Hz component remains dominant, while harmonics introduced by the PWM process remain more than 40 dB below the fundamental component. The PWM carrier, however, also generates high-frequency spectral components around the carrier frequency (see Figure 5). These components are what has to be removed by the analog reconstruction filters, leaving only the desired low-frequency sinusoidal envelope.

Figure 3. Frequency spectrum of the 60 Hz lookup table.

Figure 4. Frequency spectrum of the LUT-modulated PWM signal(0-1kHz).

This frequency-domain view highlights two important design objectives:

• remove the DC component introduced by the PWM duty-cycle offset,
• attenuate the remaining harmonic content while preserving the desired 60 Hz sinusoidal component.

PWM spectrum and filter response

The figures below show the frequency response of the reconstruction filter superimposed on the spectrum of the LUT-modulated PWM signal.

Figure 5 shows the spectrum of the LUT-modulated PWM signal together with the reconstruction filter response over a wide frequency range. The PWM carrier and its associated sidebands can be observed at high frequencies. The reconstruction filter provides approximately 40 dB of attenuation at the carrier frequency, significantly reducing the PWM switching content.

Figure 6 focuses on the low-frequency region of interest. The DC component is strongly attenuated by the high-pass stage, while the desired 60 Hz component remains within the passband. The figure also highlights the large amplitude difference between the fundamental component and its harmonics, which are more than 40 dB below the 60 Hz signal.

Figure 5. Reconstruction filter response superimposed on the spectrum of the LUT-modulated PWM signal.

Figure 6. Zoomed view of the low-frequency region showing the passband, DC attenuation and harmonic content.

The resulting 19 Hz – 164 Hz band-pass response preserves the desired 60 Hz sinusoidal component while attenuating both the DC offset and the high-frequency PWM carrier. The origin of these cutoff frequencies is detailed in the Analog Filter Stages section.

This frequency-domain analysis provides valuable insight into the signal reconstruction process before any hardware measurements are performed.

1 kHz signal path

The 1 kHz signal follows the same PWM reconstruction principle as the 60 Hz path. However, generating a 1 kHz sinusoid with the same timer configuration would provide too few duty-cycle updates per period, resulting in visible waveform distortion.

[!TODO] Basic equation for Timer, PWM frequency... justify filter order, stopband needed...

To increase the temporal resolution, the 1 kHz signal is generated using Timer2 configured for 8-bit Fast PWM at 62.5 kHz. Although this reduces the PWM amplitude resolution from 10 bits to 8 bits, the fourfold increase in carrier frequency provides 64 PWM updates per sinusoidal period instead of only 16. This significantly improves the reconstructed waveform while keeping the analog filtering requirements manageable.

The figures below illustrate the frequency-domain behavior of the 1 kHz signal path.

Figure 7. Reconstruction filter response superimposed on the 1 kHz PWM spectrum.

Figure 8. Zoomed view of the 1 kHz passband.

Analog Filter Stages

First-order active high-pass filter

The first-order active high-pass filters are used to attenuate low-frequency components and remove DC offsets before the low-pass reconstruction stages.

Transfer function:

$$ H(s)=\frac{-R_f C_{in} s}{1+R_{in} C_{in} s} $$

Cutoff frequency:

$$ f_c=\frac{1}{2\pi R_{in} C_{in}} $$

First-order active low-pass filter

The first-order active low-pass filter is used to attenuate the high-frequency PWM carrier while preserving the reconstructed sinusoidal envelope.

Transfer function:

$$ H(s)=\frac{-R_f}{R_{in}}\frac{1}{1+R_f C_f s} $$

Cutoff frequency:

$$ f_c=\frac{1}{2\pi R_f C_f} $$

Second-order Sallen-Key low-pass filter

The second-order Sallen-Key low-pass filter is used to provide stronger attenuation of the high-frequency PWM carrier while preserving the 1 kHz sinusoidal envelope.

Transfer function:

$$ T(s)= \frac{\frac{K}{R_{4a}R_{4b}C^2}} {s^2+s\frac{\frac{1}{R_{4a}}+\frac{2-K}{R_{4b}}}{C} +\frac{1}{R_{4a}R_{4b}C^2}} $$

where:

$$ K = 1+\frac{R_B}{R_A} $$

$$ C_{4a}=C_{4b}=C $$

Cutoff frequency:

$$ f_c=\frac{1}{2\pi\sqrt{R_{4a} R_{4b} C_{4a} C_{4b}}} $$

Differential signal generator

[!TIP] Contributions welcome

This section is still under development.

If you know of good references (books, application notes, university lectures, or papers) covering differential signal generation, common-mode signal injection, feel free to suggest them by opening an issue or submitting a pull request.

[!TODO] Gain for common mode and differential mode experimental validation. PCB

Instrumentation Amplifier

The instrumentation amplifier (INA) is the device under test in this project. Its role is to amplify the differential component of the input signal (1kHz) while rejecting the common-mode interference (60Hz) intentionally injected by the differential signal generator. This makes the test bench suitable for experimentally demonstrating the Common-Mode Rejection Ratio (CMRR), one of the key performance metrics of instrumentation amplifiers.

The circuit is implemented using the classical three-op-amp topology. The first stage provides high input impedance together with programmable differential gain, while the second stage subtracts the two amplified input signals and rejects the common-mode component.

[!TODO] Enrich, stages and roles, effects on common mode and differential mode for each stage.

Differential gain

$$ A_d = \frac{R_2}{R_1}\left(1+\frac{R_3}{R_4/2}\right) $$

Common-mode rejection ratio

$$ CMRR=\frac{A_d}{A_{cm}} $$

or, in decibels,

$$ CMRR_{dB}=20\log_{10}\left(\frac{A_d}{A_{cm}}\right) $$

Recommended reference

Sedra, A. S., Smith, K. C., Microelectronic Circuits, 7th Edition, Section 2.4.2 – A Superior Circuit: The Instrumentation Amplifier, p. 82.

CMRR and Measured Performance

Figure 13. Measured differential input voltage Vid (left) and
common-mode input voltage Vicm (right), used to characterize
the differential and common-mode gains of the instrumentation amplifier.

Figure 14. Measured instrumentation amplifier output under differential-mode
excitation (left) and common-mode excitation (right). Each mode was measured
independently, with the unused signal-generator channel connected to ground.

The measured differential and common-mode gains are:

$$ A_d = \frac{V_{od,pp}}{V_{id,pp}} = \frac{6.56}{0.352} = 18.636 $$

$$ A_{cm} = \frac{V_{ocm,pp}}{V_{icm,pp}} = \frac{0.0768}{0.568} = 0.135 $$

The resulting experimental common-mode rejection ratio is:

$$ CMRR_{dB} = 20\log_{10}\left|\frac{A_d}{A_{cm}}\right| = 20\log_{10}\left|\frac{18.636}{0.135}\right| = \mathbf{42.80\ dB} $$

Testing the Signal

Experimental PWM Signal Validation

The PWM carrier signals were experimentally characterized using a Rigol DS1054Z oscilloscope. The acquired waveforms were exported as CSV files and processed in MATLAB to obtain their frequency spectra (Matlab figures are more fun to look at than oscilloscope screenshots).

For the 60 Hz signal path, the PWM waveform clearly shows the low-frequency sinusoidal envelope modulating the high-frequency PWM carrier. The measured FFT confirms the presence of the desired 60 Hz component together with the PWM carrier, validating both the firmware implementation and the theoretical frequency-domain analysis.

For the 1 kHz signal path, the corresponding FFT confirms the presence of the desired fundamental component at 976.6 Hz together with the harmonic content introduced by PWM modulation.

Figure 9. Measured unfiltered PWM waveforms for the 60 Hz and 1 kHz signal paths.

Figure 10. MATLAB FFT of the measured PWM waveforms prior to analog reconstruction filtering.

These measurements validate the PWM generation firmware, the oscilloscope acquisition procedure, and the MATLAB analysis tools before evaluating the analog reconstruction filters.

[!TODO] Refine script for 1kHz FFT, better resolution possible?

Viewing filtered sinusoidal signals

The two filtered outputs are used as the building blocks for the test signal:

• $V_{icm}$ : 60 Hz sinusoidal common-mode component
• $V_{id}$ : 1 kHz sinusoidal differential-mode component

The initial 1 kHz reconstruction exhibited visible distortion, most likely due to the limited number of PWM duty-cycle updates per sinusoidal period and insufficient attenuation of higher-order harmonics. The issue was resolved by configuring Timer2 for 8-bit Fast PWM operation, which increased the PWM carrier frequency and improved the separation between the desired signal and the carrier, making analog reconstruction significantly more effective.

[!NOTE] After seeing so many distorted waveforms, seeing a clean 1 kHz sine wave on my oscilloscope for the first time definitely put a smile on my face.

Viewing differential signals with common mode

The reconstructed 60 Hz common-mode component and the 1 kHz differential component are combined to generate the pair of input signals applied to the instrumentation amplifier, Vid+ and Vid−.

Figure 11. Measured outputs of the differential signal generator. Both
outputs share the same 60 Hz common-mode component, while the 1 kHz
differential component is applied with a 180?? phase shift between
Vid+ and Vid???. The full acquisition is shown on the left,
while the zoomed view on the right highlights the differential voltage
between the two outputs.

Viewing common-mode attenuation

Figure 15. Instrumentation amplifier input and output signals. The two input
signals Vid+ and Vid??? (left) contain the 1 kHz
differential signal superimposed on the 60 Hz common-mode component.
The instrumentation amplifier output (right) preserves the amplified
differential signal while rejecting most of the common-mode component.

Hardware Implementation

Breadboard Prototype

The complete signal generator was first assembled and validated on a solderless breadboard before the PCB was designed. This prototype allowed the analog filters and differential signal generation to be experimentally verified while providing a convenient platform for debugging and iterative improvements.

The breadboard implementation also facilitated oscilloscope measurements used throughout this repository to validate the theoretical analysis and guide the final hardware design.

Figure 12. Breadboard implementation of the differential signal generator
used to validate the PWM reconstruction filters and the generated
differential and common-mode signals prior to PCB fabrication.

PCB Design

Signal Generator PCB

Figure 16. PCB layout of the differential signal generator.

[!TODO] Fix the resistors sticking out when you get a chance.

Instrumentation Amplifier PCB

Figure 17. PCB layout of the three-op-amp instrumentation amplifier.

Performance

[!TODO] Clean Table with Instrumentation Amplifier performance Acm, Ad, CMMR. To do with PCB!

Compatibility

Software

Hardware

Safety

This project is intended for educational and laboratory use.

The signal generator and instrumentation amplifier operate from a ±5 V dual power supply, making the circuit relatively safe to handle. Nevertheless, good laboratory practices should always be followed.

• Verify all wiring before powering the circuit.
• Double-check the polarity of the dual supply rails.
• Never exceed the absolute maximum ratings of the integrated circuits.
• Ensure that all instruments share a common reference when making oscilloscope measurements.
• Disconnect power before modifying the circuit or replacing components.

This repository does not involve mains voltages. The 60 Hz common-mode signal is synthetically generated and is not connected to the electrical power grid.

The authors assume no responsibility for damage to equipment or personal injury resulting from the misuse or modification of this design.

Resources

Related instrumentation amplifier projects:

• Laboratory Instrumentation Amplifier with 16-bit 1 MSPS ADC
• Design and Implementation of Instrumentation amplifier

Acknowledgements

Parts of this project were inspired by laboratory material and concepts developed for the course:

GEL-3000 - Électronique des composants intégrés (Université Laval)

Special thanks to:

• Prof. Benoit Gosselin
• Michelle Janusz
• Sébastien Rigaut
• Antoine Lefloïc

for their contributions to the original laboratory framework and educational material.

This repository extends and adapts those concepts into a standalone experimental instrumentation amplifier and signal-generation test bench.