Thomas Schatzl wrote: > > Actually at least SSE-2 (AMD'll implement this one, not SSE-1) is quite well > thought (32/64 bit FP - , 128 bit Integer - SIMD). And programmers are > slowly getting tired of rewriting code for lots of different extensions; > apart from that the sharing of FPU/MMX/3Dnow! is awkward to handle. This is correct. > And most probably AMD thinks it costs less money than inventing and > advertising something new. They have given up 3DNow!(+) in favour of SSE - 2 > too. I think Sledgehammer will support both? 3DNow! and SSE2 at the same time? And SSE2 seems to be more a replacement for the planned new FPU... > > > BTW, I would prefer Sledgehammer over Itanium. > > I do the opposite. X86 architecture long backwards compatibility is unique > to microprocessor architecture. 'Venerable' P4 is already straining heavily > on that (actually already Pentium class cpu's do) > I don't think another surgical operation on top of that makes much sense. Intel still has to show that Itanium is more powerful than RISC based architectures, the Alpha for example. If we would leave the x86 area, I really would prefer the Alpha or similar CPUs over Itanium. > The problem with it is that Itanium relies on the compiler creating well > optimized code. And exactly this is a very important problem. > Nearly all compilers rely on the CPU getting faster and > their optimization techniques, not code optimization (except e.g. VTune), so > the Itanium architecture runs far under its' possibilities atm. > Intel's spending lot's of money for compiler development. But why are there other architectures which are already faster for years now, not as complex as Itanium and which don't need a highly complex compiler?