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Mailing lists / fpc-devel / 2026-02

Xtensa build for ESP32 - Error: unknown opcode or format name 'dpfr'

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Unknown author

We followed the instructions on this ...

https://wiki.freepascal.org/Xtensa

... and on the referred-to page ...

https://docs.espressif.com/projects/esp-idf/en/stable/esp32/get-started/index.html

A considerable way through the resulting FPC build this happened ...

Show quoted text 21 lines
Compiling ./chm/src/htmlutil.pas Assembling htmlutil Assembling chmsitemap chm/units/xtensa-freertos/chmsitemap.s: Assembler messages: chm/units/xtensa-freertos/chmsitemap.s:927: Error: unknown opcode or format name 'dpfr' chm/units/xtensa-freertos/chmsitemap.s:5575: Error: unknown opcode or format name 'dpfr' chm/units/xtensa-freertos/chmsitemap.s:9957: Error: unknown opcode or format name 'dpfr' chmsitemap.pas(866) Error: Error while assembling exitcode 1 chmsitemap.pas(866) Fatal: There were 2 errors compiling module, stopping Fatal: Compilation aborted The installer encountered the following error: Compilation of "units/xtensa-freertos/BuildUnit_chm.pp" failed $0000000000539999 $00000000005449FB $0000000000543891 $0000000000544D31 $000000000054843A $0000000000538112 $0000000000538824 $0000000000487426

FPC source used was downloaded at UTC 19:05 2026-02-13, and the ESP IDF is v5.5.2

Get the same behaviour with ESP IDF v5.0.9.

Platform is AlmaLinux 10 x86.

*****

Not related to the above, but possibly relevant when compiling for ESP32. On the FP Xtensa page are mentioned files esp32_out.ld and esp32.project.ld, but neither exists on the development machine.

*****

We're aware of the FP Xtensa page saying "Warning: The Xtensa support is highly experimental and prone to be broken. This description is work in progress."

Being able to use FP for producing ESP32 apps will make a huge productivity difference, compared with the alternatives. With the Xtensa build there's too many unknowns for us to handle in the forseeable future.

A possible alternative is to run a Z80 emulator plus an I/O layer on the ESP32, and either configure FP to generate Z80 code or revive TP3/80.

Cheers
IOPEN Devels

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Christo Crause
to Unknown author

On Sun, Feb 15, 2026 at 11:45 AM iopen devel via fpc-devel <

Show quoted text 11 lines
wrote: A considerable way through the resulting FPC build this happened ... > Compiling ./chm/src/htmlutil.pas > Assembling htmlutil > Assembling chmsitemap > chm/units/xtensa-freertos/chmsitemap.s: Assembler messages: > chm/units/xtensa-freertos/chmsitemap.s:927: Error: unknown opcode or format name 'dpfr'

It is encouraging if the build process completed the RTL.

The dpfr opcode is valid for xtensa, so something else must be amiss. Can you show more of the preceding make messages,
perhaps up to the make command that invoked the compiler for the packages folder.

*****

Show quoted text 5 lines
Not related to the above, but possibly relevant when compiling for ESP32. On the FP Xtensa page are mentioned files esp32_out.ld and esp32.project.ld, but neither exists on the development machine.

That information is a bit outdated, from around esp-idf V5 these linker script names changed to memory.ld and sections.ld.

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Christo Crause
to Unknown author: We followed the instructions on this ... ... and on the referred-to page ... A…

On Sun, Feb 15, 2026 at 11:45 AM iopen devel via fpc-devel <

wrote: > chm/units/xtensa-freertos/chmsitemap.s:927: Error: unknown opcode or format name 'dpfr'

Some checking shows that xtensa-esp32-elf-as does not recognise the DPFR instruction.

The DPFR instruction is only used in one location in the compiler: https://gitlab.com/freepascal.org/fpc/source/-/blob/main/compiler/xtensa/ncpuinl.pas?ref_type=heads#L277 One potential fix would be to define a feature flag for the xtensa controllers to indicate whether the prefetch functionality should be skipped.

Please log an issue to ensure this is not forgotten ( https://gitlab.com/freepascal.org/fpc/source/-/issues).

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