I have started work on the fpc avr32. I used the patches from Laksen to get started but am using the newer released fpc as a code base. So far I have added support for the following processors :

at32uc3b0256es
at32uc3b0256
at32uc3b1256es
at32uc3b1256
at32uc3c0512crevc
at32uc3c0512c
at32uc3c1512crevc
at32uc3c1512c
at32uc3l016
at32uc3l032
at32uc3l064
at32uc3l116
at32uc3l132
at32uc3l164
at32uc3l216
at32uc3l232
at32uc3l264
at32uc3l316
at32uc3l332
at32uc3l364

Since Atmel will eventually discontinue the AVR32 that runs Linux, I have no plan to do any work on AVR32 Linux.

I still need to write some evaluation code for the LCD, EEPROM, I2C, CAN, LIN, etc. I won't include that into the compiler but as an addon.

I am going to use the evaluation board AT32UC3C-EK to test the code for the at32uc3c0512crevc part and the EVK1101 for the at32uc3b0256es. My debugging tool is JTAGICE mkII.

If anyone has newer evaluation boards and wish to work on this, you will have to adapt my code for those boards. For the at32uc3c0512c the difference is the ethernet port and the bugs in the watchdog. The most obnoxious watchdog bugs were fixed in the production release. Does anyone know if the ethernet is actually present in the engineering sample despite the specs that tells otherwise?

For the uc3b differences are kind of important but for most code they are minuscule. The clock is a bit different. Code can be arranged to used either this processor or a newer one.

I don't have any uc3l devices so I won't mess with this for now.

I have copied source and binaries on my website. I compiled the code under Scientific Linux 6.2 which is a free version of Linux that uses the source of Redhat Enterprise Linux 6.

How do I get an account so I can put my code on a directory on the fpc svn?

Michel

Are you using the code from branches/laksen/avr32new or something older?

And have you managed to fixed the non-aligned access bugs, that was where I got stuck?

Regards,
Jeppe

I took the code from that new one. I am just starting. My first task was to port to some devices I have and have a binary to work with. One thing that I found annoying was that the makefiles do not seem to know about the fact that the compiler may be a 64 bit compiler.

I have several uc3c0512 and uc3c1512 plus an evaluation board. The evaluation board for the uc3b0256es has very few features, not quite as fancy as the one for the automotive part.

I have not looked at the non-aligned access bugs yet but will do in time. First I have to have something that I can debug on one of my evaluation boards. On the subject, the alignment is for word or dword access. You cannot access a word in the middle, you will get a trap interrupt. Byte access shouldn't be an issue.

In which case are you having the issue with non alignment? so I will know which function to look at.

Michel

PC relative word loads aren't aligned automatically, and due to the variable instruction length such an instruction might end up on a halfword boundary. I have no clue how to fix it in a simple way. LDDPC has a very small allowable offset

Jeppe Græsdal Johansen wrote

PC relative word loads aren't aligned automatically, and due to the variable instruction length such an instruction might end up on a halfword boundary. I have no clue how to fix it in a simple way. LDDPC has a very small allowable offset

Are you doing your own assembler or what? Shouldn't the assembler handle that alignment?

When I created the binary I used the Atmel avr32 assembler, the one generated with the patches given by Atmel and not one that would be generated by fpc makefiles if there is any. I saw some mention of generating an assembler there but didn't investigate. It didn't seem to make sense to try to reinvent the wheel.

travail]$ avr32-as --version
GNU assembler (Catudal Software) 2.22
Copyright 2011 Free Software Foundation, Inc.
This program is free software; you may redistribute it under the terms of the GNU General Public License version 3 or later. This program has absolutely no warranty.
This assembler was configured for a target of `avr32'.

My assembler is just a compilation of one of the latest binutils using some of Atmel's latest patches.

I had to create a link so fpc would find the assembler as it uses a name of an assembler that doesn't exist.

I didn't like the name choosen for fpc so I created a link for a name that would be more in line with my other compilers and assemblers

To me it makes more sense

-rwxr-xr-x 2 root root 290400 17 janv. 2012 /usr/bin/pic32mx-gcc -rwxr-xr-x 1 root root 1471419 17 janv. 2012 /usr/bin/pic32mx-as -rwxr-xr-x 2 root root 600662 11 mai 21:50 /usr/bin/avr32-gcc -rwxr-xr-x 1 root root 1106875 11 mai 19:19 /usr/bin/avr32-as lrwxrwxrwx 1 root root 8 7 oct. 15:54 /usr/bin/avr32-embedded-as -> avr32-as

-rwxr-xr-x 2 root root 1718149 19 janv. 2012 /usr/bin/v850-elf-gcc -rwxr-xr-x 1 root root 929315 19 janv. 2012 /usr/bin/v850-elf-as -rwxr-xr-x 2 root root 617763 18 janv. 2012 /usr/bin/mips-sde-elf-gcc -rwxr-xr-x 1 root root 1560458 17 janv. 2012 /usr/bin/mips-sde-elf-as

lrwxrwxrwx 1 root root 12 23 oct. 09:39 /usr/bin/avr32-fpc -> ppcrossavr32

Michel

Jeppe Græsdal Johansen wrote

PC relative word loads aren't aligned automatically, and due to the variable instruction length such an instruction might end up on a halfword boundary. I have no clue how to fix it in a simple way. LDDPC has a very small allowable offset _______________________________________________

I am not sure why you are saying that the words are not aligned automatically. I have been working with the at32uc3c devices for more than 2 years and never had issues of alignment with gcc or IAR. Could it be that you use an internal buggy linker? Can't you tell the compiler to use avr32-ld instead of the internal linker? The only way I would see that you would get alignment problems is if you force fixed addresses for each functions. Normally the linker will padd with a byte if the code is not on a word boundary. If you use a proper linker file you can force the linker to align data on the correct word boundary. If you need to access data indirectly all you have to do is make sure that you do not access bytes but 16 bit, 32 bit or 64 bit variables.

I will keep you posted on my progress.

A couple of questions for other fpc developers. How do you define data to be in flash instead of RAM? With IAR C Compiler I just have to define the data as const and it is automatically put into flash instead of RAM. How do I signal the fpc compiler to use the proper linker file when using an external linker? How do I impose an address for the stack and heap? In the uc3c devices there is 64k or regular ram and 4k of high speed ram which with IAR C Compiler I assign to the stack and heap. I wouldn't want it fixed with the compiler in case I decide to have a different address area and use that 4k for some other reason.

Michel