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Mailing lists / fpc-devel / 2011-12

arm embedded on 2.6.0rc1

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Geoffrey Barton

I have been trying to cross-compile arm embedded for a cortexm3 using 2.6.0rc1. I had this working previously with 2.4.0 and stellaris controllers.

Following the instructions on the wiki page 'TARGET_Embedded' and adding suitable devices into cpuinfo etc. where they have been missed out, I can build a test program. However disassembling the resulting elf file shows the sections system_fpc_cpuuint, system_sysinitfpu, fpc_initializeunits, fpc_initializeunitsetc, system_internalexit, fpc_do_exit, system_system_exit and init$_system to be 32 bit arm code not thumb2. The rest of the program, including the stellaris.pp code, are correct thumb2 code.

It appears the armv7m subarch is not being acted on when compiling rtl? I got the same result if I substituted cortexm3 for this too.

Geoffrey

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Jeppe Græsdal Johansen
to Geoffrey Barton
Geoffrey Barton wrote 12 lines
I have been trying to cross-compile arm embedded for a cortexm3 using 2.6.0rc1. I had this working previously with 2.4.0 and stellaris controllers. Following the instructions on the wiki page 'TARGET_Embedded' and adding suitable devices into cpuinfo etc. where they have been missed out, I can build a test program. However disassembling the resulting elf file shows the sections system_fpc_cpuuint, system_sysinitfpu, fpc_initializeunits, fpc_initializeunitsetc, system_internalexit, fpc_do_exit, system_system_exit and init$_system to be 32 bit arm code not thumb2. The rest of the program, including the stellaris.pp code, are correct thumb2 code. It appears the armv7m subarch is not being acted on when compiling rtl? I got the same result if I substituted cortexm3 for this too. Geoffrey _______________________________________________ fpc-devel maillist - http://lists.freepascal.org/mailman/listinfo/fpc-devel

Do you have an example of how you can see it is 32 bit arm code and not thumb2?

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Geoffrey Barton
Show quoted text 21 lines
From: Jeppe Græsdal Johansen Subject: Re: [fpc-devel] arm embedded on 2.6.0rc1 Date: 20 December 2011 21:20:07 GMT To: FPC developers' list Reply-To: FPC developers' list Den 20-12-2011 21:51, Geoffrey Barton skrev: > I have been trying to cross-compile arm embedded for a cortexm3 using 2.6.0rc1. I had this working previously with 2.4.0 and stellaris controllers. > > Following the instructions on the wiki page 'TARGET_Embedded' and adding suitable devices into cpuinfo etc. where they have been missed out, I can build a test program. However disassembling the resulting elf file shows the sections system_fpc_cpuuint, system_sysinitfpu, fpc_initializeunits, fpc_initializeunitsetc, system_internalexit, fpc_do_exit, system_system_exit and init$_system to be 32 bit arm code not thumb2. The rest of the program, including the stellaris.pp code, are correct thumb2 code. > > It appears the armv7m subarch is not being acted on when compiling rtl? I got the same result if I substituted cortexm3 for this too. > > Geoffrey > > > _______________________________________________ > fpc-devel maillist - > http://lists.freepascal.org/mailman/listinfo/fpc-devel Do you have an example of how you can see it is 32 bit arm code and not thumb2?

previously:-

00005cf4 <SYSTEM_FPC_CPUINIT>:
5cf4: 46ec mov ip, sp
5cf6: e92d 4800 stmdb sp!, {fp, lr}
5cfa: 46e3 mov fp, ip
5cfc: b08a sub sp, #40
5cfe: f000 f803 bl 5d08 <SYSTEM_SYSINITFPU>
5d02: 46dd mov sp, fp
5d04: e91d 8800 ldmdb sp, {fp, pc}

now:-

00005d88 <SYSTEM_FPC_CPUINIT>:
5d88: e92d4000 push {lr}
5d8c: e24dd004 sub sp, sp, #4
5d90: e59f0010 ldr r0, [pc, #16] ; 5da8 <SYSTEM_FPC_CPUINIT+0x20> 5d94: e5d00000 ldrb r0, [r0]
5d98: e3500000 cmp r0, #0
5d9c: 0b000002 bleq 5dac <SYSTEM_SYSINITFPU>
5da0: e28dd004 add sp, sp, #4
5da4: e8bd8000 pop {pc}
5da8: 20000018 andcs r0, r0, r8, lsl r0

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Geoffrey Barton
to Geoffrey Barton

I have found a way out.

You need to add 'CROSSOPT=-Cpcortexm3' at the end of the line:-

make clean buildbase installbase CROSSINSTALL=1 OS_TARGET=embedded CPU_TARGET=arm SUBARCH=armv7m in the wiki page.

Then the rtl builds in thumb2.

Geoffrey

Geoffrey Barton wrote 47 lines
On 21 Dec 2011, at 10:43, wrote: > From: Jeppe Græsdal Johansen > Subject: Re: [fpc-devel] arm embedded on 2.6.0rc1 > Date: 20 December 2011 21:20:07 GMT > To: FPC developers' list > Reply-To: FPC developers' list > > > Den 20-12-2011 21:51, Geoffrey Barton skrev: >> I have been trying to cross-compile arm embedded for a cortexm3 using 2.6.0rc1. I had this working previously with 2.4.0 and stellaris controllers. >> >> Following the instructions on the wiki page 'TARGET_Embedded' and adding suitable devices into cpuinfo etc. where they have been missed out, I can build a test program. However disassembling the resulting elf file shows the sections system_fpc_cpuuint, system_sysinitfpu, fpc_initializeunits, fpc_initializeunitsetc, system_internalexit, fpc_do_exit, system_system_exit and init$_system to be 32 bit arm code not thumb2. The rest of the program, including the stellaris.pp code, are correct thumb2 code. >> >> It appears the armv7m subarch is not being acted on when compiling rtl? I got the same result if I substituted cortexm3 for this too. >> >> Geoffrey >> >> >> _______________________________________________ >> fpc-devel maillist - >> http://lists.freepascal.org/mailman/listinfo/fpc-devel > Do you have an example of how you can see it is 32 bit arm code and not thumb2? previously:- 00005cf4 <SYSTEM_FPC_CPUINIT>: 5cf4: 46ec mov ip, sp 5cf6: e92d 4800 stmdb sp!, {fp, lr} 5cfa: 46e3 mov fp, ip 5cfc: b08a sub sp, #40 5cfe: f000 f803 bl 5d08 <SYSTEM_SYSINITFPU> 5d02: 46dd mov sp, fp 5d04: e91d 8800 ldmdb sp, {fp, pc} now:- 00005d88 <SYSTEM_FPC_CPUINIT>: 5d88: e92d4000 push {lr} 5d8c: e24dd004 sub sp, sp, #4 5d90: e59f0010 ldr r0, [pc, #16] ; 5da8 <SYSTEM_FPC_CPUINIT+0x20> 5d94: e5d00000 ldrb r0, [r0] 5d98: e3500000 cmp r0, #0 5d9c: 0b000002 bleq 5dac <SYSTEM_SYSINITFPU> 5da0: e28dd004 add sp, sp, #4 5da4: e8bd8000 pop {pc} 5da8: 20000018 andcs r0, r0, r8, lsl r0

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