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Mailing lists / fpc-devel / 2011-09

implementation AVX for Intel/AMD Prozessors

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Torsten

Hi,

im starting with implementation of AVX (Intel/AMD) in fpc-assemblercode.

I use in first step a external assembler (linux "as"). In this case, it is easy to use XMM-Register (max. 3 parameter) (only change the file "x86ins.dat", examble:

[VMOVDQA]
(Ch All, Ch None, Ch None)
xmmreg, xmmrm \361\...

For use of YMM-Register i have change the file "x86reg.dat"

NR_YMM0,$07000000,ymm0,%ymm0,ymm0,ymm0,21,21,17,OT_YMMREG,0 NR_YMM1,$07000001,ymm1,%ymm1,ymm1,ymm1,22,22,18,OT_YMMREG,1 NR_YMM2,$07000002,ymm2,%ymm2,ymm2,ymm2,23,23,19,OT_YMMREG,2 NR_YMM3,$07000003,ymm3,%ymm3,ymm3,ymm3,24,24,20,OT_YMMREG,3 NR_YMM4,$07000004,ymm4,%ymm4,ymm4,ymm4,25,25,21,OT_YMMREG,4 NR_YMM5,$07000005,ymm5,%ymm5,ymm5,ymm5,26,26,22,OT_YMMREG,5 NR_YMM6,$07000006,ymm6,%ymm6,ymm6,ymm6,27,27,23,OT_YMMREG,6 NR_YMM7,$07000007,ymm7,%ymm7,ymm7,ymm7,28,28,24,OT_YMMREG,7 NR_YMM8,$07000008,ymm8,%ymm8,ymm8,ymm8,-1,-1,25,OT_YMMREG,0,64 NR_YMM9,$07000009,ymm9,%ymm9,ymm9,ymm9,-1,-1,26,OT_YMMREG,1,64 NR_YMM10,$0700000a,ymm10,%ymm10,ymm10,ymm10,-1,-1,27,OT_YMMREG,2,64 NR_YMM11,$0700000b,ymm11,%ymm11,ymm11,ymm11,-1,-1,28,OT_YMMREG,3,64 NR_YMM12,$0700000c,ymm12,%ymm12,ymm12,ymm12,-1,-1,29,OT_YMMREG,4,64 NR_YMM13,$0700000d,ymm13,%ymm13,ymm13,ymm13,-1,-1,30,OT_YMMREG,5,64 NR_YMM14,$0700000e,ymm14,%ymm14,ymm14,ymm14,-1,-1,31,OT_YMMREG,6,64 NR_YMM15,$0700000f,ymm15,%ymm15,ymm15,ymm15,-1,-1,32,OT_YMMREG,7,64

Next step is change the files "cpubase, cgbase, aasmcpu, ...". What do i consider?

Regards
Torsten

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Florian Klämpfl
to Torsten
Torsten wrote 11 lines
Hi, im starting with implementation of AVX (Intel/AMD) in fpc-assemblercode. I use in first step a external assembler (linux "as"). In this case, it is easy to use XMM-Register (max. 3 parameter) (only change the file "x86ins.dat", examble: [VMOVDQA] (Ch All, Ch None, Ch None) xmmreg, xmmrm \361\...

Problem is probably the correct encoding sequence.

Show quoted text 21 lines
For use of YMM-Register i have change the file "x86reg.dat" NR_YMM0,$07000000,ymm0,%ymm0,ymm0,ymm0,21,21,17,OT_YMMREG,0 NR_YMM1,$07000001,ymm1,%ymm1,ymm1,ymm1,22,22,18,OT_YMMREG,1 NR_YMM2,$07000002,ymm2,%ymm2,ymm2,ymm2,23,23,19,OT_YMMREG,2 NR_YMM3,$07000003,ymm3,%ymm3,ymm3,ymm3,24,24,20,OT_YMMREG,3 NR_YMM4,$07000004,ymm4,%ymm4,ymm4,ymm4,25,25,21,OT_YMMREG,4 NR_YMM5,$07000005,ymm5,%ymm5,ymm5,ymm5,26,26,22,OT_YMMREG,5 NR_YMM6,$07000006,ymm6,%ymm6,ymm6,ymm6,27,27,23,OT_YMMREG,6 NR_YMM7,$07000007,ymm7,%ymm7,ymm7,ymm7,28,28,24,OT_YMMREG,7 NR_YMM8,$07000008,ymm8,%ymm8,ymm8,ymm8,-1,-1,25,OT_YMMREG,0,64 NR_YMM9,$07000009,ymm9,%ymm9,ymm9,ymm9,-1,-1,26,OT_YMMREG,1,64 NR_YMM10,$0700000a,ymm10,%ymm10,ymm10,ymm10,-1,-1,27,OT_YMMREG,2,64 NR_YMM11,$0700000b,ymm11,%ymm11,ymm11,ymm11,-1,-1,28,OT_YMMREG,3,64 NR_YMM12,$0700000c,ymm12,%ymm12,ymm12,ymm12,-1,-1,29,OT_YMMREG,4,64 NR_YMM13,$0700000d,ymm13,%ymm13,ymm13,ymm13,-1,-1,30,OT_YMMREG,5,64 NR_YMM14,$0700000e,ymm14,%ymm14,ymm14,ymm14,-1,-1,31,OT_YMMREG,6,64 NR_YMM15,$0700000f,ymm15,%ymm15,ymm15,ymm15,-1,-1,32,OT_YMMREG,7,64

I'am not sure if the ymm registers should be an own register class. After all, they are a superset of xmm

Next step is change the files "cpubase, cgbase, aasmcpu, ...". What do i consider?

In which regard?

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Daniël Mantione
to Florian Klämpfl

Op Sun, 18 Sep 2011, schreef Florian Klämpfl:

I'am not sure if the ymm registers should be an own register class. After all, they are a superset of xmm

Exactly. Since if xmm0 is allocated, ymm0 is allocated too; the register allocator should treat them as a single register. xmm0 and ymm0 are a subregister of the same superregister.

Daniël

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Torsten
to Florian Klämpfl: Problem is probably the correct encoding sequence. I'am not sure if the ymm registers…
Florian Klämpfl wrote 13 lines
Am 18.09.2011 10:54, schrieb Torsten: > Hi, > > im starting with implementation of AVX (Intel/AMD) in fpc-assemblercode. > > I use in first step a external assembler (linux "as"). In this case, it > is easy to use XMM-Register (max. 3 parameter) (only change the file > "x86ins.dat", examble: > > [VMOVDQA] > (Ch All, Ch None, Ch None) > xmmreg, xmmrm \361\... Problem is probably the correct encoding sequence.

Yes, i known. I think that is important for the internal assembler, but not external.

Show quoted text 23 lines
> > For use of YMM-Register i have change the file "x86reg.dat" > > > NR_YMM0,$07000000,ymm0,%ymm0,ymm0,ymm0,21,21,17,OT_YMMREG,0 > NR_YMM1,$07000001,ymm1,%ymm1,ymm1,ymm1,22,22,18,OT_YMMREG,1 > NR_YMM2,$07000002,ymm2,%ymm2,ymm2,ymm2,23,23,19,OT_YMMREG,2 > NR_YMM3,$07000003,ymm3,%ymm3,ymm3,ymm3,24,24,20,OT_YMMREG,3 > NR_YMM4,$07000004,ymm4,%ymm4,ymm4,ymm4,25,25,21,OT_YMMREG,4 > NR_YMM5,$07000005,ymm5,%ymm5,ymm5,ymm5,26,26,22,OT_YMMREG,5 > NR_YMM6,$07000006,ymm6,%ymm6,ymm6,ymm6,27,27,23,OT_YMMREG,6 > NR_YMM7,$07000007,ymm7,%ymm7,ymm7,ymm7,28,28,24,OT_YMMREG,7 > NR_YMM8,$07000008,ymm8,%ymm8,ymm8,ymm8,-1,-1,25,OT_YMMREG,0,64 > NR_YMM9,$07000009,ymm9,%ymm9,ymm9,ymm9,-1,-1,26,OT_YMMREG,1,64 > NR_YMM10,$0700000a,ymm10,%ymm10,ymm10,ymm10,-1,-1,27,OT_YMMREG,2,64 > NR_YMM11,$0700000b,ymm11,%ymm11,ymm11,ymm11,-1,-1,28,OT_YMMREG,3,64 > NR_YMM12,$0700000c,ymm12,%ymm12,ymm12,ymm12,-1,-1,29,OT_YMMREG,4,64 > NR_YMM13,$0700000d,ymm13,%ymm13,ymm13,ymm13,-1,-1,30,OT_YMMREG,5,64 > NR_YMM14,$0700000e,ymm14,%ymm14,ymm14,ymm14,-1,-1,31,OT_YMMREG,6,64 > NR_YMM15,$0700000f,ymm15,%ymm15,ymm15,ymm15,-1,-1,32,OT_YMMREG,7,64 I'am not sure if the ymm registers should be an own register class. After all, they are a superset of xmm

OK.

> Next step is change the files "cpubase, cgbase, aasmcpu, ...". > What do i consider? In which regard?

I do not know exactly which functions need to be changed. I'm hoping for tips.

Show quoted text 5 lines
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Daniël Mantione
to Torsten

Op Sun, 18 Sep 2011, schreef Torsten:

I do not know exactly which functions need to be changed. I'm hoping for tips.

You will have to be a bit exploring here; AVX is a major upgrade to the x86 instruction set, and there will likely not be a few routines that need to be changed.

First step is to make sure they can be used in assembler routines. The assembler is largely table driven, so it you have added them to the tables, a lot should work already.

Nevertheless, I expect that modifications are necessary in the both the assembler generators (ag*.pas) and assembler readers (ra*.pas) due to the additional operand that needs to be written/parsed.

Only when the point is reached that the instructions are handled well by the assembler reader/writers you could start by adding code generator support.

Daniël

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