(CC'ing to fpc-devel since I think it may of interest to other people as well)
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CSE means "common subexpression elimination", ie. if part of an expression occurs more than once within a number of instructions, it is only evaluated once and the result is used twice (instead evaluating it twice).
Curently, CSE only works for integers and pointer loads. The improvement I did was that the CSE previously only looked at what the registers contained at the moment the previous instruction was done to see whether one of those registers contained the expression that was being calculated starting with the current instruction (yes, that's a whole mouthful :)
Now, the CSE goes as far back as possible (this is not till the start of the block of code unfortunately) to see whether at any given point this expression was calculated instead of just at the previous instruction.
What does/will register renaming do?
This has to do with how far you can go back to search for expressions. E.g, suppose now the following code is generated:
movl 8(%ebp),%eax
addl 4(%ebp),%eax
movzwl 12(%ebp),%edx
cmpl %eax,%edx
jg .L1
movzwl 12(%ebp),%eax
movl 8(%ebp),%edx
addl 4(%ebp),%edx
movl (eax,edx),ebx
This would currently be optimized to
movl 8(%ebp),%eax
addl 4(%ebp),%eax
movzwl 12(%ebp),%edx
cmpl %eax,%edx
jg .L1
movl %edx,%eax
movl 8(%ebp),%edx
addl 4(%ebp),%edx
movl (eax,edx),ebx
The CSE in this case was that the "movzwl 12(%ebp),%eax" was eliminated (and the value in edx was reused). The problem is that you can't eliminate the second loading of edx by reusing the value that was already in eax, because
a) after the "movl %edx,%eax", %eax doesn't contain the correct value anymore
b) before the "movl %edx,%eax", you can store it in edx yet because the current value of edx is still used in that "movl %edx,%eax" (the optimizer isn't smart enough yet to allocate a new register to temporary hold this value)
Register renaming in this case will simply mean that the above becomes
movl 8(%ebp),%eax
addl 4(%ebp),%eax
movzwl 12(%ebp),%edx
cmpl %eax,%edx
jg .L1
movl 8(%ebp),%eax
addl 4(%ebp),%eax
movl (edx,eax),eax
after which the next CSE pass can change it into
movl 8(%ebp),%eax
addl 4(%ebp),%eax
movzwl 12(%ebp),%edx
cmpl %eax,%edx
jg .L1
movl (edx,eax),eax
Assume they imact is on integers only.. will they impact my fft?
No. For that, you'll have to wait for the CSE at the parse tree level. Writing a CSE that works at the assembler level for the stack based 80x86 FPU would be a lot of work (it would be completely different from the integer based CSE which we currently have).
Please let me know how (when) to activate it & I'll try making compiler & IDE with it & see what slow down is & whether it works!
It's already automatically activated. There were some bugs in it though, which I was fixing when I got your email :)
Jonas
