Hello,

I am trying hard to avoid C on an ARM7TDMI/ARMv4T Controller (AT91SAM7Sx) ;-)

fpc seems to work pretty well on the controller (running the firmware out of flash memory) unless it comes to interrupts. But interrupts are required for my application. The ARM interrupt implementation seems to be rather complex.

Usually an interrupt procedure needs special entry and exit code. First I tried to simulate this with inline assembler. This failed because fpc did not support the required instructions. Then I modified the fpc generated assembler source and assembled this manually. As this would only be a proof of concept and I could not be sure, that the fpc developers would implement this in the compiler, I gave up on this (for now) and tried a second approach.

The startup code catches the interrupt and provides a wrapper around a normal C (Pascal) function, so that the special entry/exit code is not required. This is of cause the slower interrupt processing variant. Unfortunately the set of linker script and startup code (which work with C) fail with fpc. The fpc generated binary has a size of 0 byte (no error message). So there is something fundamental wrong. I attached the original files and would be happy, if someone could look over it or has another idea, what I could check to get this work.

Regards, Bernd.

Hello, I am trying hard to avoid C on an ARM7TDMI/ARMv4T Controller (AT91SAM7Sx) ;-)

What about simply supporting the interrupt keyword on arm? Point me to some description and I'll implement it.

That would be great. I have got the information out of books (one is Steve Furber, ARM system-on-chip architecture). I am looking for a good description regarding ARM interrupts (especially concerning the interrupt entry/exit code) in the web and post the link here.

Thanks, Bernd.

I searched the web for some details:

http://www.state-machine.com/arm/Building_bare-metal_ARM_with_GNU.pdf shows the complete interrupt mess on Page 6-1ff regarding gcc.

http://www.inf.ethz.ch/personal/wirth/Articles/Oberon/Interrupts.pdf Page 1 and 2.

http://www.mikrocontroller.net/topic/71979
Last post from Martin Thomas.

and did not look further. I really think it is not worth your effort to implement this in fpc now. ARM interrupt handling is so complex, because of the different ARM modes and the different exception types (IRQ/Fast IRQ/SWI etc. which need different return address alignment). Another point are the vendor specific vector controller implementations. I think this would be very hard to implement, hard to debug and maybe error prone.

I could live with a performance penalty and think my second approach (going via the wrapper in the startup code) is perhaps the better start with fpc. This would have had the advantage too, that this should work with other controller vendors (ATMEL, ST, NXP, Samsung) without changing the compiler. Only the linker script and the startup code had to be adapted.

Regards, Bernd.