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Mailing lists / fpc-devel / 2008-01

powerpc-linux 2.0 release crash?

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Micha Nelissen

Hi,

I think powerpc-linux 2.0 release crashes for me in process startup at address $1000032. Disassembler shows a mtfsfi instruction which is unknown to me (padding?). Register lr is at $10000360.

Does anyone have a map file of the ppcppc binary of 2.0 by accident? :-)

Micha

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Jonas Maebe
to Micha Nelissen
Micha Nelissen wrote
I think powerpc-linux 2.0 release crashes for me in process startup at address $1000032. Disassembler shows a mtfsfi instruction which is unknown to me (padding?).

That instruction clears a floating point exception flag (all those flags are cleared by the system unit's startup code). It probably means that your powerpc does not have floating point support (is it an embedded one?). There is no softfloat support for the ppc ports at this time.

Jonas

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Micha Nelissen
to Jonas Maebe
Jonas Maebe wrote
That instruction clears a floating point exception flag (all those flags are cleared by the system unit's startup code). It probably means that your powerpc does not have floating point support (is it an embedded one?). There is no softfloat support for the ppc ports at this time.

Ah, bummer. It has an e500v2 core, which has "embedded" floating point support, whatever that means. It does not include fp instructions that require floating-point registers (FPRs). The instructions work on the GPRs instead?

Is it just startup code, or many places that assume floating point support?

Micha

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Jonas Maebe
to Micha Nelissen
Micha Nelissen wrote 9 lines
Jonas Maebe wrote: > That instruction clears a floating point exception flag (all those > flags are cleared by the system unit's startup code). It probably > means that your powerpc does not have floating point support (is > it an embedded one?). There is no softfloat support for the ppc > ports at this time. Ah, bummer. It has an e500v2 core, which has "embedded" floating point support, whatever that means.

It means that
a) you can connect some fpu coprocessor
b) it throws specific "fpu not present" exception if none is present, so you can catch those and emulate them if you want to

It does not include fp instructions that require floating-point registers (FPRs). The instructions work on the GPRs instead?

No, those instructions simply do not exist.

Is it just startup code, or many places that assume floating point support?

I have no idea, since I never considered adding support for ppc without an fpu.

Jonas

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Micha Nelissen
to Jonas Maebe
Jonas Maebe wrote
> It does not include fp instructions that require floating-point > registers (FPRs). The instructions work on the GPRs instead? No, those instructions simply do not exist.

Well the datasheet gives a list of the instructions that are implemented, e.g. efsadd, efdadd, efvsadd (it even has vector support). Syntax "rD,rA,rB". I guess the fpu control instructions are missing.

Micha

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Jonas Maebe
to Micha Nelissen
Micha Nelissen wrote 8 lines
Jonas Maebe wrote: >> It does not include fp instructions that require floating-point >> registers (FPRs). The instructions work on the GPRs instead? > No, those instructions simply do not exist. Well the datasheet gives a list of the instructions that are implemented, e.g. efsadd, efdadd, efvsadd (it even has vector support).

Those are instructions belonging to some specific embedded extension (BookE or so). Those instructions do not exist on a regular ppc (they're also not altivec instructions).

I guess the fpu control instructions are missing.

I'm pretty sure all regular fpu instructions are missing.

Jonas

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