HI FP experts.

Is there any decent chance that there is or that it's possible to create a cross compiler to run FP programs on an Analog Devices BlackFin CPU that runs the appropriate Linux distribution ?

-Michael

No. Not without pushing a port to it in some way.

No. Not without pushing a port to it in some way.

Thanks. And I suppose doing a port for that processor would be quite a lot of work, regarding the ASM code is very strange if you compare it to the code of 80x86, PPC or ARM.

-Michael

Well, this depends how good one wants to make such a port ...

regarding the ASM code is very strange if you compare it to the code of 80x86, PPC or ARM.

As far as I have seen the BlackFin has two cores: an arm like risc core and a dsp.

Hi!

The BlackFin and other Analog Devices DSPs have an uncommon assembler syntax. Contrary to well-known mnemonic style like add eax,ecx
they use an algebraic syntax like
r2 = r1 + r3, r4 = dm(i0,m1); /* addition and memory access */ r3 = r2 * r4, r1 = r2 + r4; /* multiplication and addition */

Regarding the implementation for a compiler this is no principal problem, because the compiler has an internal representation of what it wants to do, and this can be equally expressed in (=transformed to) mnemonic and algebraic syntax.

A totally different topic is the inherent parallel processing of a DSP. Usually they can utilize several processing units (+, *) and memories within a single cycle (e.g. see above). Instruction ordering and interleaving to utilize parallelism is tedious to do by hand and I think also challenging for a compiler.

Bye
Hansi

Florian, Thanks a lot for discussing this !

Well, this depends how good one wants to make such a port ...

In this case the (first version of the) port does not need to be very "good" (in the sense of creating optimized code), but of course the compiler needs to produce correct code that performs what had been expressed in Pascal.

Do you think, it could be doable to create a not very optimized compiler ? I would join the team, but as I'm new to compiler construction, I don't think I can start that project by myself.

The beauty of the Blackfin is that is extremely fast and offers an excellent price/performance relation. The chip I intend to use comes with two CPUs each clocked with 600 MHz. As the Blackfin can do single instruction / multiple data (e.g. four 8 bit adds or two 16 bit multiply/adds in a cycle <per CPU>) and provides a zero-overhead looping mechanism the performance per CPU is (depending on the Application) like a 800 to 1500 MHz ARM. And the dual core chip costs about $20. Of course there are several smaller Blackfin chips. So IMHO this is an excellent processor for embedded use. And thus an interesting target for an FP port.

As far as I have seen the BlackFin has two cores: an arm like risc core and a dsp.

Not really. It's a DSP (predecessor of the Blackfin was the "Shark" DSP line) that has been enhanced by features necessary for standard CPUs.

-Michael

r2 = r1 + r3, r4 = dm(i0,m1); /* addition and memory access */

Yep. In my answer to Florian I forgot that (other than ARM) the Blackfin can do a calculation and a memory access in a single instruction cycle. That explains the much better performance even with standard (non-DSP-alike) tasks.

r3 = r2 * r4, r1 = r2 + r4; /* multiplication and addition */

I did not know yet that it can do two independent 32 bit calculations and that it can do 32 bit multiplications. Anyway, even if only two 32 additions can be done in one instruction cycle this is a big chance for optimization.

Maybe a first version could skip the great chances for optimization and just do a single operation per instruction cycle.

It should be able to create a working compiler that way.

-Michael

Hi!

The above code is based on an example program for some Shark or TigerShark DSP, so its likely that the BlackFin has other processing units. I've written the code just as an example for the algebraic style.

You have to carefully study the structure of the CPU (i.e. processing units, busses, registers, address calculation, ...) to know what can be done in parallel. In the example I've looked at there was a line with 4-instructions-in-1-cycle:

  f10 = f2 * f4, f12 = f10 + f12, f2 = dm(i1,m2), f4 = pm(i8,m8);

(ADSP-2106x).

In modern CPUs the parallel utilization of busses and processing units is state of the art. The ressource allocation and parallelization is done on the fly during program execution by some smart logic inside the CPU. When a compiler does optimization for a certain CPU it anticipates this and sorts the instructions and registers approprately to gain a few percent more speed.

The beauty of DSPs is that its in the hand of the compiler (or assembler coder) to do the full optimization.

Bye
Hansi

Coding the compiler part isn't that hard. I can do this, I did the initial arm port within a few weeks. The more annoying part is doing the debugging and find the things being broken.

If you're interested, start a wiki page with some information where to get docs, tools, info about calling conventions etc.

Michael Schnell schrieb: > Florian, Thanks a lot for discussing this !

Big thanks from me too!

Coding the compiler part isn't that hard. I can do this, I did the initial arm port within a few weeks. The more annoying part is doing the debugging and find the things being broken.

We have to start a research hardware project end of may, and are also in the middle between choosing an ARM/FPC way or a blackfin/non fpc way. This discussions opens a new possibility, which I would gratly favour. We could help to debug a blackfin port, and i would also donate some money for a development board, if that helps.

Helmut

Sorry, i forgot to mention a valuable source of information:

http://www.bluetechnix.at/

Hi!

Sorry, i forgot to mention a valuable source of information: http://www.bluetechnix.at/

Coincidental I'm (partly) working for this company and know their staff quite well. If you need any assistance or similar I'd be happy to help out.

Bye
Hansi

If you're interested, start a wiki page with some information where to get docs, tools, info about calling conventions etc.

Thanks for the encouragement !

Next month I'll see an FAE who just started supporting the BlackFin line. After that I hope I can see a bit clearer.

-Michael

We have to start a research hardware project end of may, and are also in the middle between choosing an ARM/FPC way or a blackfin/non fpc way. This discussions opens a new possibility, which I would gratly favour.

Great to know that I am not the only one ! :-)

-Michael