Is FPC going to support SSE extensions for x86 on higher level?

(There is MMX unit, which tests processor for presence of mmx/sse/sse2/3dnow/3dnow/3dnowdsp extensions and defines types for data stored in MMX registers (however, docs mention signed types and don't mention longword to be stored in registers).

XMM registers (from SSE extensions) are supported in assembler parser, are used in assembler routines in compiler sources (up to SSE3), some types are defined in libc package, some types are defined in several processor architecture describing files by Florian Klaempfl, and little more.)

That is: is mmx unit going to grow?

Will compiler optimize using SSE extensions, when optimizing for higher pentiums/k6/k7/k8? (I did not find explicit remarks about using mmx(fp)/xmm registers for optimizations.)

For scalar types, fpc supports it already, try -Cfsse and -Cfsse2 depending on your cpu.

Thank you.

However, integer operations (especially 4 longwords in xmm register) are really of interest to me.

> Thank you. > > However, integer operations (especially 4 longwords in xmm > register) are really of interest to me.

FK> Well, older fpcs had this for mmx. Since I never saw bug reports about FK> it, I thought nobody used it so we didn't implement it for sse so far :)

Ugh, this is rather fpc-pascal question, but: how can I demand (or just hope for) putting specific data to xmm register?

Is assembler the only solution?

If so, (this is even more fpc-pascal question with fpc-devel subquestion) what docs/soft was used for FPC compiler optimizing (for me the hard part is cycles counting: even for small portions of code it's not easy to estimate prefetches and others)? Is intel vtune designed for this task for linux/windows on intel processors?

Would it be of any help, if I submit obviously not optimal processor specific asm code examples generated by FPC if I find any? If so, should I present only 2.1.x comments?